The present invention relates to a semiconductor memory device. More particularly, the present invention relates to a method for fabricating a memory device wherein a guard contact formed in a chip guard is strengthened to prevent cracking caused from outside stresses.
FIG. 1 is a layout view illustrating a conventional semiconductor device. FIG. 2 is a simplified cross-sectional view taken along line I-I′ of FIG. 1.
Referring to FIGS. 1 and 2, a lower electrode line structure 30 and an upper electrode line structure 50 are disposed over a semiconductor substrate (not shown) having a lower structure including a gate, a bit line, and a bit line contact. A guard contact 40 is disposed between the lower electrode line structure 30 and the upper electrode line structure 50. Here, the guard contact 40 is formed of a whole body-type contact vertical to the lower electrode line structure 30. The guard contact 40 is formed to prevent impurity particles from passing.
FIG. 3 is a simplified cross-sectional view illustrating a conventional semiconductor device. In particular, it shows the failure of a fuse guard structure caused by the outside stresses.
Referring to FIG. 3, a gate 5 and a bit line 20 is formed over a semiconductor substrate (not shown), and a bit line contact 15 is formed to connect the bit line 20 to the gate 5. A lower electrode line structure 30 is formed over the bit line 20, and a lower electrode contact 25 is formed to connect the lower electrode line structure 30 to the bit line 20. An upper electrode line structure 50 is formed over the lower electrode line structure 30, and a whole body-type guard contact 40 is formed to connect the upper electrode line structure 50 to the lower electrode line structure 30.
According to the above conventional semiconductor device, the guard contact cannot prevent a crack from occurring when a chip is cut due to shrinkage to a fuse of the device. As a result, a “cracking phenomenon” between the electrode line structures shown in FIG. 3 occurs due to the outside stress and pressures in other processes. This allows impurity particles to enter into the lower electrode line structure through the cracks. Accordingly, the yield and reliability of the device may be degraded.